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1 description ltc 2107 16-bit, 210 msps adcs demonstration circuit 2183 a supports the lt c ? 2107, a high speed and high dynamic range adc . it was specially designed for applications that require a single-ended ac- coupled input. dc2183 supports the LTC2107 using the ddr lvds output mode. the LTC2107 characteristics are listed in table 1. de- pending on the version, the circuitry on the analog inputs is optimized for analog input frequencies from 5 mhz to 70mhz or 70mhz to 180mhz. l, lt , lt c , lt m , linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. p erformance s ummary refer to the LTC2107 data sheet for proper input networks for different input frequencies. design files for this circuit board are available at http://www .linear.com/demo/dc2183a specifications are at t a = 25c parameter conditions min typ max units supply voltage C dc2183 this supply must provide up to 800ma. 3.3 5.0 v analog input range depending on pga setting 1.6 2.4 v p-p logic input voltages minimum logic high maximum logic low 1.2 0.6 v v logic output voltages (differential) nominal logic levels (100 load, 3.5ma mode, 1.25v common mode) minimum logic levels (100 load, 3.5ma mode, 1.25v common mode) 0.350 0.247 v v sampling frequency (encode clock frequency) 10 210 mhz convert clock level (single ended) logic levels (enc C tied to gnd) 0 2.5 v convert clock level (differential) minimum logic levels (enc C not tied to gnd, 1.2v common mode) 0.2 v table 1: dc2183 variants dc2183 variants adc part number resolution maximum sample rate input frequency 2183a-a LTC2107 16-bit 210 msps 5mhz to 70mhz 2183a-b LTC2107 16-bit 210 msps 70mhz to 180mhz dc2183af demo manual dc2183a
2 quick s tart p roce d ure dc2183 is easy to set up to evaluate the performance of the LTC2107 a/d converter. refer to figure 1 for proper measurement equipment set- up and follow the procedure below: setup the dc1371 data acquisition and collection system was supplied with the dc2183 board. follow the dc1371 quick start guide to install the required software and for con - necting the dc1371 to the dc2183 and to a pc. figure 1. dc2183 proper measurement equipment setup (zoom in for detail) single-ended analog input. absorptive filter is required for data sheet performance single-ended encode clock. use a low-jitter signal generator with proper filtering jumpers shown in their default positions the dc2183 connects to the dc1371 via an fmc connector j1 3.3v to 5v dc2183af demo manual dc2183a
3 q uick s tart p roce d ure h ard w are s etup smas: j 2: analog input. apply a signal to j 2 from a 50 driver. absorptive filters are required for data sheet performance . j3: encode clock input. apply a clock signal to this sma connector from a 50 driver. a filter is required for data sheet performance. j4: encode clock input for differential signals. by default the dc2183 is defined to accept a single-ended clock sig - nal. it can be modified to accept a differential clock signal through j 3 and j 4. some component changes are required, see the encode clock section for more information. mmcx connectors: j1: optional analog input. as a default, this connector is not populated. standard mmcx connectors should be used. to connect this connector to the input of the adc, populate r22 and remove j2 completely. by using this connector, the dc2183 becomes fully compliant with the fmc specification. turrets: vin: positive input voltage for the adc and digital buffers. this voltage feeds a regulator that supplies the proper voltages for the adc and buffers. the voltage range for this turret is 3.3v to 5v. ext ref: optional reference voltage. this pin is connected directly to the sense pin of the adc. connect ext ref to a 1.25 v external reference and the external reference mode is automatically selected. the external reference must be 1.25v 25 mv for proper operation. if no external voltage is supplied, this pin will be pulled up to 2.5 v through a weak pull-up resistor. gnd: ground connection. this demo board only has a single ground plane. this turret should be tied to the gnd terminal of the power supply being used. jumpers: the dc2183 demonstration circuit should have the fol - lowing jumper settings as default positions ( per figure?1) which configure the adc in serial programming mode. in the default configuration jp1-jp2 should be left in the default locations. this will pull par /ser low, and the required pins high through weak pull-up resistors so the spi commands can be sent from the pc. if jp1 is set to par then jumpers jp1-jp2 can be configured manually. jp1: par /ser: selects parallel or serial programming mode (default: serial) cmos/l vds: in serial programming mode ( ser), this pin should be in the lvds position to allow for serial data transfer. (default: lvds or up) in the parallel program- ming mode ( par ), this pin controls the digital output mode. when this pin is in the cmos position, the full-rate cmos output mode is enabled. when this pin is in the lvds position, the double data rate lvds output mode (with 3.5 ma output current) is enabled. note: when using the dc1371, parallel mode ddr lvds must be selected. jp2: pga: in serial programming mode ( ser), this pin is pulled high through a weak pull-up resistor to allow serial data transfer. in the parallel programming mode ( par ), this pin controls the programmable gain amplifier front- end, pga. in the 1 x jumper position a front-end gain of 1x is selected, input range of 2.4v p-p . in the 3/2 jumper position a front-end gain of 1.5 x is selected, input range of 1.6v p-p . (default: 3/2 or up) r and : in s erial programming mode ( ser), this pin is pulled high through a weak pull-up resistor to allow serial data transfer. in the parallel programming mode ( par ), this pin becomes the digital output randomization control bit. when this pin is in the off position, digital output randomization is disabled. when this pin is in the on position, digital output randomization is enabled. to decode the randomized data, exclusive-or each bit with the least significant bit. this is done for you in pscope when the randomizer option is toggled. (default: on or up). dc2183af demo manual dc2183a
4 jp3: shutdo w n: in the run position this pin results in normal operation of the adc. in the shdn position the adc is powered down and the digital outputs are set in high impedance state. (default: run or down) jp4: eeprom: eeprom write protect. for factory use only. should be left in the enable (prog) position. jp5: overflow test point: this is a test point for the dif - ferential over flow signal. this jumper can be installed to provide a convenient way to probe the overflow signal. (default: removed) jp6: clock term: this jumper provides termination volt - ages for various signaling standards. lvpecl, cml, and l vds termination voltages can be selected. the selected voltage is then used to terminate the clock input through 50 resistors. by removing the jumper completely an ex - ternal voltage can be applied directly to pin 5 of jp6 so an arbitrary signaling scheme can be used . (default: lvpecl) a ppl ying p o w er and s ignals to the dc2183 d emonstra tion c ircuit if a dc1371 is used to acquire data from the dc2183, the dc1371 must first be connected to a powered usb port and provided an external 5 volts before applying +3.3v to +5.0 v across the pins marked vin and gnd on the dc2183. dc2183 requires at least 3.3 v for proper operation. regulators on the board produce the voltages required for the adc. the dc2183 demonstration circuit requires up to 800 ma. the dc2183 should not be removed or connected to the dc1371 while power is applied. a nalog i nput n et w or k apply the analog input signal of interest to the sma con - nector on the dc2183 demonstration circuit board marked j2. in the default setup, the dc2183 has an sma input that is meant to be driven with a 50 source. the dc2183 is populated with an input diplexer filter to provide a 50 characteristic impedance over all frequencies. this can be modified to produce different frequency responses as needed. in almost all cases, off-board absorptive filters will be required on the analog input of the dc2183 to produce data sheet snr. the off-board filter should be located close to the input of the demo board to avoid reflections from impedance discontinuities at the driven end of a long transmission line. most filters do not present 50 outside the passband. in some cases , 3 db to 10 db pads may be required to make the filter look more absorptive to obtain low distortion . e ncode c loc k apply an encode clock to the sma connector on the dc2183 demonstration circuit board marked j3. as a default the dc2183 is populated to have a single ended clock input. for the best noise performance, the encode input must be driven with a very low jitter signal generator source. the amplitude should be as large as possible up to 2 v pCp or 10dbm. the dc2183 demo board is designed to accept single ended signals as a default. to modify the dc2183 to ac - cept a differential signal, remove c31 and populate r18 with a 0 resistor. changing the position of jp6 to cml, lvds, or lvpecl selects the proper termination for your input signal. these smas are positioned 0.5 apart to accommodate lt c differential clock boards. q uick s tart p roce d ure dc2183af demo manual dc2183a
5 s oft w are the dc1371 is controlled by the pscope system software which can be downloaded from the linear technology ? website at http://www.linear.com/software/ . if a dc1371 was provided, follow the dc1371 quick start guide and the instructions below. to start the data collection software, if pscope.exe is in - stalled ( by default ) in \ program files\ lt c \pscope\, double click the pscope icon or bring up the run window under the start menu and browse to the pscope directory and select pscope. if the dc2183 demonstration circuit is properly connected to the dc1371, pscope should automatically detect the dc2183, and configure itself accordingly. if necessary, the procedure below explains how to manually configure pscope. under the configure menu, go to adc configuration... check the config manually box and use the following configuration options, see figure 2: manual configuration settings: bits: 16 alignment: 16 fpga ld: s2157 channs: 1 bipolar: unchecked positive-edge clk: unchecked figure 2. adc configuration if everything is hooked up properly, powered and a suit- able convert clock is present, clicking the collect button should result in time and frequency plots displayed in the pscope window. additional information and help for pscope is available in the dc1371 quick start guide and in the online help available within the pscope program itself. q uick s tart p roce d ure dc2183af demo manual dc2183a
6 s erial p rogramming pscope has the ability to program the dc2183 board serially through the dc1371. there are several options available for the LTC2107 that are only available through serial programming. pscope allows all of these features to be tested. these options are available by first clicking on the set demo bd options icon on the pscope toolbar ( figure 3). figure 3. pscope toolbar this will bring up the menu shown in figure 4. figure 4. demobd configuration options. this menu allows any of the options available for the LTC2107 to be programmed serially. the LTC2107 has the following options: sleep mode C selects between normal operation and sleep mode: ? off (default) C entire adc is powered, and active ? on C the entire adc is powered down dither C selects between internal dither being enabled or disabled: ? enabled (default) C internal dither enabled ? disabled C internal dither disabled gain (pgs) C selects input range of the adc: ? 1.0 (default) C selects the 2.4v input range ? 1.5 C selects the 1.6v input range duty cycle stabilizer C enables or disables duty cycle stabilizer: ? stabilizer off (default) C duty cycle stabilizer disabled ? stabilizer on C duty cycle stabilizer enabled clkout invert C selects the polarity of the clkout signal: ? disabled (default) C normal clkout polarity ? enabled C clkout polarity is inverted clkout phase C selects the phase delay of the clkout signal: ? 0 deg (default) C no clkout delay ? 45 deg C clkout delayed by 45 degrees ? 90 deg C clkout delayed by 90 degrees ? 135 deg C clkout delayed by 135 degrees k eep alive osc C enables or disables the internal keep alive oscillator: ? disabled (default) C keep alive oscillator is disabled ? enabled C keep alive oscillator is enabled q uick s tart p roce d ure dc2183af demo manual dc2183a
7 encode termination C enables or disables lvds internal termination: ? disabled (default) C disables internal termination ? enabled C enables internal termination lvds current C selects the l vds output drive current: ? 1.75ma - lvds output driver current ? 2.1ma - lvds output driver current ? 2.5ma - lvds output driver current ? 3.0ma - lvds output driver current ? 3.5ma (default) - lvds output driver current ? 4.0ma - lvds output driver current ? 4.5ma - lvds output driver current tw o s complement C enables twos complement mode: ? enabled (default) C selects twos complement mode ? disabled C selects offset binar y mode randomizer C enables data output randomizer: ? disabled (default) C disables data output randomizer ? enabled C enables data output randomizer abp C alternate bit polarity (abp) mode: ? disabled (default) C disables alternate bit polarity ? enabled C enables alternate bit polarity ( before enabling abp, be sure the part is in offset binary mode) output test C selects digital output test patterns: ? none (default) C adc data presented at output ? all out = 1 C all digital outputs are 1 ? all out = 0 C all digital outputs are 0 ? checkerboard C of and d15-d0 alternate between 1 0101 0101 1010 0101 and 0 1010 1010 0101 1010 on alternating samples ? alternating C digital outputs alternate between all 1s and all 0s on alternating samples once the desired settings are selected hit ok and pscope will automatically update the register of the device on the dc2183 demo board. dc2183af demo manual dc2183a
8 p arts list item qty reference part description manufacturer/ part number required circuit components 1 2 c1, c12 cap., x7r, 0.1f, 16v 10% 0402 avx , 0402yc104 kat 2a 2 2 c2, c4 cap., x5r, 100f, 16v 20% 1210 taiyo yuden, emk325abj107mm-t 3 2 c3, c22 cap., x5r, 1f, 25v 10% 0603 tdk, c1608x5r1e105k080ac 4 3 c5, c6, c7, c31 cap., x7r, 0.01f, 16v 10% 0402 tdk, c1005x7r1c103k 5 5 c11, c14, c15, c23, c29 cap., x5r, 0.1f, 16v 10% 0402 avx , 0402yd104 kat 2a 6 1 c13 cap., x5r, 2.2f, 16v 20% 0603 avx , 0603yd225 mat 2a 7 4 c16, c19, c20, c24 cap., x5r, 10f, 16v 20% 1206 tdk, c3216x5r1c106m 8 1 c17 cap., x5r, 2.2f, 16v 20% 0402 tdk, c1005x5r1c225m050bc 9 0 c18, c30 cap., opt , 0402 option 10 1 c21 cap., x5r, 47f, 16v 20% 1206 tdk, c3216x5r1c476m160ab 11 1 c25 cap., x7r, 10f, 16v 10% 0805 samsung, cl21b106koqnnne 12 2 c26, c27 cap., cog, 2200pf, 25v 5% 0402 kemet, c0402c222j3gactu 13 0 c28 cap., opt , 0201 option 14 1 e1 test point, turret, .061, pbf mill-max, 2308-2-00-80-00-00-07-0 15 2 e2, e3 test point, turret, .094, pbf mill-max, 2501-2-00-80-00-00-07-0 16 3 jp1, jp2, jp6 header, 2x3 pin, 0.079cc sullins, nrpn032paen-rc 17 2 jp3, jp4 header, 3 pin 0.079 single row sullins, nrpn031paen-rc 18 0 jp 5 jumper, 2pins, .079 ctr, op tion option 19 0 j1 con.,mmcx, right angle, thru-hole, option amphenol connex, 262105 20 1 j2 con., sma 50 edge-launch amphenol connex, 132372 21 2 j3, j4 con.,sma jack, straight, thru-hole amphenol connex, 132134 22 0 l2 inductor, option, 0603 option 23 1 l3 ferrite bead, 47s@100mhz, 0603 murata, blm18bb470sn1d 24 1 p1 bga connector, 40x10 samtec, seam-40-02.0-s-10-2-a-k-tr 25 6 r1, r6, r7, r8, r14, r17 res., chip, 1k, 1/16w, 5% 0402 vishay, crcw04021k00jned 26 1 r2, r9, r10 res., chip, 0s jumper, 1/16w, 0402 vishay, crcw04020000z0ed 27 3 r3, r4, r5 res., chip, 4.99k, 1/16w, 1% 0402 vishay, crcw04024k99fked 28 2 r11, r12 res., chip, 33.2s, 1/16w, 1% 0402 vishay, crcw040233r2fked 29 2 r15, r16 res., chip, 100s, 1/16w, 5% 0402 vishay, crcw0402100rjned 30 0 r18, r20, r23 res., chip, opt , 0402 option 31 1 r21 res., chip, 49.9s, 1/8w, 1% 0402 vishay, crcw040249r9fkedhp 32 0 r22 res., chip, opt , 0603 option 33 4 r24, r29, r30, r31 res., chip, 33s, 1/16w, 5% 0402 vishay, crcw040233r0jned 34 0 r25 res., chip, opt , 0805 option 35 2 r34, r36 res., chip, 24.9s, 1/16w, 1% 0402 vishay, crcw040224r9fked 36 1 r37 res., chip, 200, 1/20w, 1% 0201 vishay, crcw0201200rfked 37 2 t1, t3 transformer, rf,smt, 1:1balun macom, maba-007159-000000 38 1 t2 transformer, rf 1:1 flux coupled, smt macom, mabaes0060 39 1 u2 ic, ldo linear regulator, 2.5v, dfn linear tech., lt1965edd-2.5#pbf 40 1 u3 ic, ldo linear regulator, 1.8v, dfn linear tech., lt1965edd-1.8#pbf 41 1 u4 ic, serial eeprom, tssop microchip tech., 24lc32a-i/st 42 7 xjp1, xjp2, xjp3, xjp4, xjp5, xjp6, xjp7 shunt, 2mm samtec, 2sn-bk-g dc2183af demo manual dc2183a
9 item qty reference part description manufacturer/ part number dc2183a-a required circuit components 1 1 dc2183a dc2183a general bom 2 1 c8 cap., np0, 4.7pf, 50v 0.25pf, 0402 tdk, c1005c0g1h4r7c 3 2 c9,c10 cap., np0, 8.2pf, 50v 0.25pf 0402 tdk, c1005c0g1h8r2c 4 1 l1 inductor, ceramic chip, 56nh, 2%, 0603 murata, lqp18mn56ng02d 5 2 r13,r19 res., chip, 15, 1/20w, 5% 0201 vishay, crcw020115r0jned 6 0 r26,r28 res., chip, opt , 0402 option 7 2 r27,r32 res., chip, 86.6, 1/10w, 1% 0603 vishay, crcw060386r6fkea 8 1 r33 res., chip, 86.6, 1/16w, 1% 0402 vishay, crcw040286r6fked 9 1 u1 adc, 16 bit, 210 msps, qfn linear tech., LTC2107iuk#pbf dc2183a-b required circuit components 1 1 dc2183a dc2183a general bom 2 1 c8 cap., np0, 12pf, 50v 5% 0402 murata, grm1555c1h120ja01d 3 2 c9,c10 cap., np0, 3.9pf, 50v 0.25pf 0402 tdk, c1005c0g1h3r9c 4 1 l1 inductor, ceramic chip, 18nh, 2%, 0603 murata, lqp18mn18ng02d 5 2 r13,r19 res., chip, 10, 1/20w, 5% 0201 vishay, crcw020110r0jned 6 2 r26,r28 res., chip, 68.1, 1/16w, 1% 0402 vishay, crcw040268r1fked 7 2 r27,r32 res., chip, 43.2, 1/10w, 1% 0603 vishay, crcw060343r2fkea 8 1 r33 res., chip, 105, 1/16w, 1% 0402 vishay, crcw0402105rfked 9 1 u1 adc, 16 bit, 210 msps, qfn linear tech., LTC2107iuk#pbf dc2183af demo manual dc2183a
10 s chematic diagram figure 5. dc2183a demo circuit schematic, page 1 5 5 4 4 3 3 2 2 1 1 d d c c b b a a ext ref 3/2 1x on off shutdown shdn run pga rand cmos lvds par ser clk+ clk- 03-18-2014 - sdo cml lvds lv pecl clock term ain assembly type u1 dc2183a-a dc2183a-b bits 16 16 12pf 4.7pf c8 c9,c10 8.2pf 3.9pf l1 56nh 18nh r27,r32 86.6 43.2 105 86.6 r33 msps 210 210 LTC2107iuk LTC2107iuk assembly options table * r26,r28 opt 68.1 r19,r13 15 10 * * * * * * of+ of- fin (mhz) 5< fin <70 70< fin <180 par/!ser shdn shdn par/!ser ovdd vdd ovdd vdd vdd vdd vdd vdd vdd ovdd cs/lvds rand/sdi pga/sck d9/8+ d9/8- d7/6+ d7/6- d15/14+ d15/14- d3/2+ d3/2- d13/12+ d13/12- d1/0+ d1/0- d5/4+ d5/4- d11/10+ d11/10- pga/sck rand/sdi cs/lvds sdo clkout+ clkout- of- of+ size date: ic no. rev sheet of title: contract no. approvals pcb des. eng. technology fax: (408)434-0507 milpitas, ca 95035 phone: (408)432-1900 1630 mccarthy blvd. ltc confidential-for customer use only customer notice linear technology has made a best effort to design a circuit that meets customer-supplied specifications; however, it remains the customer's responsibility to verify proper and reliable operation in the actual application. component substitution and printed circuit board layout may significantly affect circuit performance or reliability. contact linear technology applications engineering for assistance. this circuit is proprietary to linear technology and schematic supplied for use with linear technology parts. 2 1 2 16-bit, 210 msps adc m.hawkins c.mayott a LTC2107 demo circuit 2183a size date: ic no. rev sheet of title: contract no. approvals pcb des. eng. technology fax: (408)434-0507 milpitas, ca 95035 phone: (408)432-1900 1630 mccarthy blvd. ltc confidential-for customer use only customer notice linear technology has made a best effort to design a circuit that meets customer-supplied specifications; however, it remains the customer's responsibility to verify proper and reliable operation in the actual application. component substitution and printed circuit board layout may significantly affect circuit performance or reliability. contact linear technology applications engineering for assistance. this circuit is proprietary to linear technology and schematic supplied for use with linear technology parts. 2 1 2 16-bit, 210 msps adc m.hawkins c.mayott a LTC2107 demo circuit 2183a size date: ic no. rev sheet of title: contract no. approvals pcb des. eng. technology fax: (408)434-0507 milpitas, ca 95035 phone: (408)432-1900 1630 mccarthy blvd. ltc confidential-for customer use only customer notice linear technology has made a best effort to design a circuit that meets customer-supplied specifications; however, it remains the customer's responsibility to verify proper and reliable operation in the actual application. component substitution and printed circuit board layout may significantly affect circuit performance or reliability. contact linear technology applications engineering for assistance. this circuit is proprietary to linear technology and schematic supplied for use with linear technology parts. 2 1 2 16-bit, 210 msps adc m.hawkins c.mayott a LTC2107 demo circuit 2183a revision history description date approved eco rev c.mayott production 2 03-14-14 revision history description date approved eco rev c.mayott production 2 03-14-14 revision history description date approved eco rev c.mayott production 2 03-14-14 c30 opt c30 opt c29 0.1uf c29 0.1uf r2 0 ohms r2 0 ohms c27 2200pf cog/npo c27 2200pf cog/npo r13 0201 r13 0201 c22 1.0uf c22 1.0uf c25 10uf 0805 c25 10uf 0805 c6 0.01uf c6 0.01uf c10 * c10 * c18 opt 0402 c18 opt 0402 j1 mmcx (option) j1 mmcx (option) 1 e1 e1 j3 j3 1 r23 opt r23 opt jp1 jp1 1 3 5 6 4 2 r32 * r32 * c11 0.1uf c11 0.1uf c9 * c9 * c31 0.01uf c31 0.01uf r16 100 r16 100 jp2 jp2 1 3 5 6 4 2 r9 0 r9 0 tp1 tp1 1 j4 j4 1 r22 opt r22 opt r37 200 0201 r37 200 0201 r36 24.9 r36 24.9 c14 0.1uf c14 0.1uf l2 opt 0603 l2 opt 0603 1 2 c3 1.0uf c3 1.0uf c28 opt 0201 c28 opt 0201 c17 2.2uf c17 2.2uf r27 * r27 * jp5 opt jp5 opt 1 2 jp6 jp6 1 3 5 6 4 2 r6 1k r6 1k r12 33.2 r12 33.2 c5 0.01uf c5 0.01uf r14 1k r14 1k r11 33.2 r11 33.2 r21 49.9 r21 49.9 r20 opt r20 opt c8 c8 c1 0.1uf c1 0.1uf c12 0.1uf c12 0.1uf r33 r33 r1 1k r1 1k r7 1k r7 1k c26 2200pf cog/npo c26 2200pf cog/npo c13 2.2uf c13 2.2uf r26 r26 t1 maba-007159-000000 t1 maba-007159-000000 5 4 3 1 2 r34 24.9 r34 24.9 r18 opt r18 opt r10 0 r10 0 r8 1k r8 1k j2 j2 1 c7 0.01uf c7 0.01uf r19 0201 r19 0201 c21 47uf 20% 1206 c21 47uf 20% 1206 t3 maba-007159-000000 t3 maba-007159-000000 5 4 3 1 2 r15 100 r15 100 r28 r28 jp3 jp3 1 2 3 r17 1k r17 1k t2 mabaes0060 t2 mabaes0060 5 4 3 1 2 c15 0.1uf c15 0.1uf l1 * l1 * 1 2 * u1 * u1 sense 1 gnd 2 gnd 3 vdd 4 vdd 5 vdd 6 gnd 7 ain+ 8 ain- 9 gnd 10 vcm 11 gnd 12 gnd 13 enc+ 14 enc- 15 gnd 16 shdn 17 sdo 18 ognd 19 ovdd 20 d1/d0n 21 d1/d0p 22 d3/d2n 23 d3/d2p 24 d5/d4n 25 d5/d4p 26 d7/6n 27 d7/6p 28 d9/8n 29 d9/8p 30 clkoutn 31 clkoutp 32 d11/d10n 33 d11/10p 34 d13/12n 35 d13/12p 36 d15/14n 37 d15/14p 38 ofn 39 ofp 40 ovdd 41 ognd 42 sdi 43 sck 44 cs 45 par/ser 46 gnd 47 gnd 48 gnd 49 dc2183af demo manual dc2183a
11 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. s chematic diagram figure 6. dc2183a demo circuit schematic, page 2 5 5 4 4 3 3 2 2 1 1 d d c c b b a a data clock 03-18-2014 gnd vin 3.3v-5v prog eeprom wp transfer strip mounting holes on thermal chassis ground 3.3v_aux vin scl sda 3.3v_aux vin vdd vdd ovdd scl sda d3/2+ d3/2- d13/12+ d13/12- d1/0+ d1/0- d5/4+ d5/4- d11/10+ d11/10- d9/8- rand/sdi pga/sck cs/lvds sdo d15/14+ d15/14- d7/6- d7/6+ d9/8+ clkout- clkout+ scl sda of- of+ size date: ic no. rev sheet of title: contract no. approvals pcb des. eng. technology fax: (408)434-0507 milpitas, ca 95035 phone: (408)432-1900 1630 mccarthy blvd. ltc confidential-for customer use only customer notice linear technology has made a best effort to design a circuit that meets customer-supplied specifications; however, it remains the customer's responsibility to verify proper and reliable operation in the actual application. component substitution and printed circuit board layout may significantly affect circuit performance or reliability. contact linear technology applications engineering for assistance. this circuit is proprietary to linear technology and schematic supplied for use with linear technology parts. 2 2 2 16-bit, 210 msps adc m.hawkins c.mayott a LTC2107 demo circuit 2183a size date: ic no. rev sheet of title: contract no. approvals pcb des. eng. technology fax: (408)434-0507 milpitas, ca 95035 phone: (408)432-1900 1630 mccarthy blvd. ltc confidential-for customer use only customer notice linear technology has made a best effort to design a circuit that meets customer-supplied specifications; however, it remains the customer's responsibility to verify proper and reliable operation in the actual application. component substitution and printed circuit board layout may significantly affect circuit performance or reliability. contact linear technology applications engineering for assistance. this circuit is proprietary to linear technology and schematic supplied for use with linear technology parts. 2 2 2 16-bit, 210 msps adc m.hawkins c.mayott a LTC2107 demo circuit 2183a size date: ic no. rev sheet of title: contract no. approvals pcb des. eng. technology fax: (408)434-0507 milpitas, ca 95035 phone: (408)432-1900 1630 mccarthy blvd. ltc confidential-for customer use only customer notice linear technology has made a best effort to design a circuit that meets customer-supplied specifications; however, it remains the customer's responsibility to verify proper and reliable operation in the actual application. component substitution and printed circuit board layout may significantly affect circuit performance or reliability. contact linear technology applications engineering for assistance. this circuit is proprietary to linear technology and schematic supplied for use with linear technology parts. 2 2 2 16-bit, 210 msps adc m.hawkins c.mayott a LTC2107 demo circuit 2183a p1j seam-10x40pin p1j seam-10x40pin gnd j1 clk1_c2m_p j2 clk1_c2m_n j3 gnd j4 gnd j5 ha03_p j6 ha03_n j7 gnd j8 ha07_p j9 ha07_n j10 gnd j11 ha11_p j12 ha11_n j13 gnd j14 ha14_p j15 ha14_n j16 gnd j17 ha18_p j18 ha18_n j19 gnd j20 ha22_p j21 ha22_n j22 gnd j23 hb01_p j24 hb01_n j25 gnd j26 pb07_p j27 hb07_n j28 gnd j29 hb11_p j30 hb11_n j31 gnd j32 hb15_p j33 hb15_n j34 gnd j35 hb18_p j36 hb18_n j37 gnd j38 vio_b_m2c j39 gnd j40 r31 33 r31 33 x1 x1 e3 e3 p1e seam-10x40pin p1e seam-10x40pin gnd e1 ha01_p_cc e2 ha01_n_cc e3 gnd e4 gnd e5 ha05_p e6 ha05_n e7 gnd e8 ha09_p e9 ha09_n e10 gnd e11 ha13_p e12 ha13_n e13 gnd e14 ha16_p e15 ha16_n e16 gnd e17 ha20_p e18 ha20_n e19 gnd e20 hb03_p e21 hb03_n e22 gnd e23 hb05_p e24 hb05_n e25 gnd e26 hb09_p e27 hb09_n e28 gnd e29 hb13_p e30 hb13_n e31 gnd e32 hb21_p e33 hb21_n e34 gnd e35 hb20_p e36 hb20_n e37 gnd e38 vadj e39 gnd e40 c16 10uf 16v 1206 c16 10uf 16v 1206 x16 x16 p1a seam-10x40pin p1a seam-10x40pin gnd a1 dp1_m2c_p a2 dp1_m2c_n a3 gnd a4 gnd a5 dp2_m2c_p a6 dp2_m2c_n a7 gnd a8 gnd a9 dp3_m2c_p a10 dp3_m2c_n a11 gnd a12 gnd a13 dp4_m2c_p a14 dp4_m2c_n a15 gnd a16 gnd a17 dp5_m2c_p a18 dp5_m2c_n a19 gnd a20 gnd a21 dp1_c2m_p a22 dp1_c2m_n a23 gnd a24 gnd a25 dp2_c2m_p a26 dp2_c2m_n a27 gnd a28 gnd a29 dp3_c2m_p a30 dp3_c2m_n a31 gnd a32 gnd a33 dp4_c2m_p a34 dp4_c2m_n a35 gnd a36 gnd a37 dp5_c2m_p a38 dp5_c2m_n a39 gnd a40 u3 lt1965edd-1.8 u3 lt1965edd-1.8 out 2 in 7 sense 3 in 8 out 1 gnd 9 shdn 6 gnd 4 gnd 5 c2 100uf 16v 1210 c2 100uf 16v 1210 x12 x12 c4 100uf 16v 1210 c4 100uf 16v 1210 r5 4.99k r5 4.99k p1k seam-10x40pin p1k seam-10x40pin vref_b_m2c k1 gnd k2 gnd k3 clk1_m2c_p k4 clk1_m2c_n k5 gnd k6 ha02_p k7 ha02_n k8 gnd k9 ha06_p k10 ha06_n k11 gnd k12 ha10_p k13 ha10_n k14 gnd k15 ha17_p_cc k16 ha17_n_cc k17 gnd k18 ha21_p k19 ha21_n k20 gnd k21 ha23_p k22 ha23_n k23 gnd k24 hb00_p_cc k25 hb00_n_cc k26 gnd k27 hb06_p_cc k28 hb06_n_cc k29 gnd k30 hb10_p k31 hb10_n k32 gnd k33 hb14_p k34 hb14_n k35 gnd k36 hb17_p_cc k37 hb17_n_cc k38 gnd k39 vio_b_m2c k40 x10 x10 x8 x8 p1f seam-10x40pin p1f seam-10x40pin pg_m2c f1 gnd f2 gnd f3 ha00_p_cc f4 ha00_n_cc f5 gnd f6 ha04_p f7 ha04_n f8 gnd f9 ha08_p f10 ha08_n f11 gnd f12 ha12_p f13 ha12_n f14 gnd f15 ha15_p f16 ha15_n f17 gnd f18 ha19_p f19 ha19_n f20 gnd f21 hb02_p f22 hb02_n f23 gnd f24 hb04_p f25 hb04_n f26 gnd f27 hb08_p f28 hb08_n f29 gnd f30 hb12_p f31 hb12_n f32 gnd f33 hb16_p f34 hb16_n f35 gnd f36 hb19_p f37 hb19_n f38 gnd f39 vadj f40 c24 10uf 16v 1206 c24 10uf 16v 1206 x6 x6 p1b seam-10x40pin p1b seam-10x40pin res1 b1 gnd b2 gnd b3 dp9_m2c_p b4 dp9_m2c_n b5 gnd b6 gnd b7 dp8_m2c_p b8 dp8_m2c_n b9 gnd b10 gnd b11 dp7_m2c_p b12 dp7_m2c_n b13 gnd b14 gnd b15 dp6_m2c_p b16 dp6_m2c_n b17 gnd b18 gnd b19 gbtclk1_m2c_p b20 gbtclk1_m2c_n b21 gnd b22 gnd b23 dp9_c2m_p b24 dp9_c2m_n b25 gnd b26 gnd b27 dp8_c2m_p b28 dp8_c2m_n b29 gnd b30 gnd b31 dp7_c2m_p b32 dp7_c2m_n b33 gnd b34 gnd b35 dp6_c2m_p b36 dp6_c2m_n b37 gnd b38 gnd b39 res0 b40 c23 0.1uf c23 0.1uf x14 x14 u2 lt1965edd-2.5 u2 lt1965edd-2.5 out 2 in 7 sense 3 in 8 out 1 gnd 9 shdn 6 gnd 4 gnd 5 x4 x4 c20 10uf 16v 1206 c20 10uf 16v 1206 x2 x2 jp4 jp4 1 2 3 r29 33 r29 33 r25 opt r25 opt u4 24lc32a u4 24lc32a a0 1 a1 2 a2 3 vss 4 sda 5 scl 6 wp 7 vcc 8 p1g seam-10x40pin p1g seam-10x40pin gnd g1 clk0_c2m_p g2 clk0_c2m_n g3 gnd g4 gnd g5 la00_p_cc g6 la00_n_cc g7 gnd g8 la03_p g9 la03_n g10 gnd g11 la08_p g12 la08_n g13 gnd g14 la12_p g15 la12_n g16 gnd g17 la16_p g18 la16_n g19 gnd g20 la20_p g21 la20_n g22 gnd g23 la22_p g24 la22_n g25 gnd g26 la25_p g27 la25_n g28 gnd g29 la29_p g30 la29_n g31 gnd g32 la31_p g33 la31_n g34 gnd g35 la33_p g36 la33_n g37 gnd g38 vadj g39 gnd g40 p1c seam-10x40pin p1c seam-10x40pin gnd c1 dp0_c2m_p c2 dp0_c2m_n c3 gnd c4 gnd c5 dp0_m2c_p c6 dp0_m2c_n c7 gnd c8 gnd c9 la06_p c10 la06_n c11 gnd c12 gnd c13 la10_p c14 la10_n c15 gnd c16 gnd c17 la14_p c18 la14_n c19 gnd c20 gnd c21 la18_p_cc c22 la18_n_cc c23 gnd c24 gnd c25 la27_p c26 la27_n c27 gnd c28 gnd c29 scl c30 sda c31 gnd c32 gnd c33 ga0 c34 12p0v c35 gnd c36 12p0v c37 gnd c38 3p3v c39 gnd c40 r3 4.99k r3 4.99k e2 e2 x11 x11 l3 ferrite bead, 47 ohms l3 ferrite bead, 47 ohms p1h seam-10x40pin p1h seam-10x40pin vref_a_m2c h1 prsnt_m2c_n h2 gnd h3 clk0_m2c_p h4 clk0_m2c_n h5 gnd h6 la02_p h7 la02_n h8 gnd h9 la04_p h10 la04_n h11 gnd h12 la07_p h13 la07_n h14 gnd h15 la11_p h16 la11_n h17 gnd h18 la15_p h19 la15_n h20 gnd h21 la19_p h22 la19_n h23 gnd h24 la21_p h25 la21_n h26 gnd h27 la24_p h28 la24_n h29 gnd h30 la28_p h31 la28_n h32 gnd h33 la30_p h34 la30_n h35 gnd h36 la32_p h37 la32_n h38 gnd h39 vadj h40 x13 x13 x9 x9 p1d seam-10x40pin p1d seam-10x40pin pg_c2m d1 gnd d2 gnd d3 gbtclk0_m2c_p d4 gbtclk0_m2c_n d5 gnd d6 gnd d7 la01_p_cc d8 la01_n_cc d9 gnd d10 la05_p d11 la05_n d12 gnd d13 la09_p d14 la09_n d15 gnd d16 la13_p d17 la13_n d18 gnd d19 la17_p_cc d20 la17_n_cc d21 gnd d22 la23_p d23 la23_n d24 gnd d25 la26_p d26 la26_n d27 gnd d28 tck d29 tdi d30 tdo d31 3p3vaux d32 tms d33 trst_n d34 ga1 d35 3p3v d36 gnd d37 3p3v d38 gnd d39 3p3v d40 x7 x7 r24 33 r24 33 r4 4.99k r4 4.99k x15 x15 x5 x5 x3 x3 r30 33 r30 33 c19 10uf 16v 1206 c19 10uf 16v 1206 dc2183af demo manual dc2183a
12 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com ? linear technology corporation 2014 lt 0714 ? printed in usa demonstration board important notice linear technology corporation (ltc) provides the enclosed product(s) under the following as is conditions: this demonstration board ( demo board) kit being sold or provided by linear technology is intended for use for engineering development or evaluation purposes only and is not provided by ltc for commercial use. as such, the demo board herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. as a prototype, this product does not fall within the scope of the european union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. if this evaluation kit does not meet the specifications recited in the demo board manual the kit may be returned within 30 days from the date of delivery for a full refund. the foregoing warranty is the exclusive warranty made by the seller to buyer and is in lieu of all other warranties, expressed, implied, or statutory, including any warranty of merchantability or fitness for any particular purpose. except to the extent of this indemnity, neither party shall be liable to the other for any indirect, special, incidental, or consequential damages. the user assumes all responsibility and liability for proper and safe handling of the goods. further, the user releases ltc from all claims arising from the handling or use of the goods. due to the open construction of the product, it is the users responsibility to take any and all appropriate precautions with regard to electrostatic discharge. also be aware that the products herein may not be regulatory compliant or agency certified (fcc, ul, ce, etc.). no license is granted under any patent right or other intellectual property whatsoever. ltc assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. ltc currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. please read the demo board manual prior to handling the product . persons handling this product must have electronics training and observe good laboratory practice standards. common sense is encouraged. this notice contains important safety information about temperatures and voltages. for further safety concerns, please contact a ltc application engineer. mailing address: linear technology 1630 mccarthy blvd. milpitas, ca 95035 copyright ? 2004, linear technology corporation dc2183af demo manual dc2183a

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